cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 135
cx29600
Manufacturer Part Number
cx29600
Description
Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29600.pdf
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CX29600
CX29600 Data Sheet
LININT (Receive Line Interrupt Indication Status Register)
The LININT register indicates that a change of status has occurred within its affiliated status signals.
NDFCNT (New Data Flag Counter)
The NDFCNT counter implements the 8-bit New Data Flag Event Counter.
29600-DSH-001-B
NOTE(S):
(1)
(2)
Single event interrupt—only a positive transition on the corresponding status bit causes this interrupt to occur. Reading the
interrupt register clears the interrupt.
Dual event interrupt—either a positive or negative transition on the corresponding status bit causes this interrupt to occur.
Reading the interrupt register clears the interrupt.
7-0
Bit
Bit
7
6
5
4
3
2
1
0
Default
Default
xxh
x
x
x
x
x
x
x
x
hex address: 0x03D
hex address:
S1_UnstableInt
NDFCnt[7:0]
Mindspeed Technologies
RDI-LInt
AIS-LInt
B2ErrInt
REI-LInt
K1K2Int
Z1Z2Int
Name
Name
S1Int
1
1
1
2
1
1
2
1
New Data Flag Event Counter
This bit indicates that a K1K2 interrupt has occurred.
This bit indicates that an AIS-L interrupt has occurred.
This bit indicates that an RDI-L interrupt has occurred.
This bit indicates that a Line BIP Error interrupt has occurred.
This bit indicates that an REI-L interrupt has occurred.
This bit indicates that an S1 byte change interrupt has occurred.
This bit indicates that a S1_Unstable byte change interrupt has
occurred.
This bit indicates that a Z1 or Z2 byte change interrupt has
occurred.
Path 1
Path 2
Path 3
Path 4
™
0x0A7
0x0E7
0x127
0x167
Description
Description
4.1 Memory Map
4.0 Registers
4-29
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