w65c51n Western Design Center, Inc., w65c51n Datasheet - Page 23

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w65c51n

Manufacturer Part Number
w65c51n
Description
Asynchronous Communications Interface Adapter Acia
Manufacturer
Western Design Center, Inc.
Datasheet
7. Precautions to consider with the crystal oscillator circuit:
8. DCDB and DSRB transitions, although causing immediate processor interrupts, have no affect on
transmitter operation. Data will continue to be sent, unless the processor forces transmitter to turn off.
Since these are high-impedance inputs, they must not be permitted to float (un-connected). If unused,
they must be terminated either to GND or VCC.
GENERATION OF NON-STANDARD BAUD RATES
Divisors
The internal counter/divider circuit selects the appropriate divisor for the crystal frequency by means of
bits 0-3 of the ACIA Control Register, as shown in Table 2.
Generating Other Baud Rates
By using a different crystal, other baud rates may be generated. These can be determined by:
Furthermore, it is possible to drive the ACIA with an off-chip oscillator to achieve other baud rates. In this
case, XTLI (Pin 6) must be the clock input and XTLO (pin 7) must be a no-connect.
a) The external crystal should be a “series” mode crystal.
b) The XTLI input may be used as an external clock input. The unused pin (XTLO) must be floating
and may not be used for any other function.
Baud Rate =
Crystal Frequency
Divisor
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