w65c51n Western Design Center, Inc., w65c51n Datasheet - Page 3

• Manufacturer Part Number: w65c51n
• Description: Asynchronous Communications Interface Adapter Acia
• Manufacturer: Western Design Center, Inc.

INTRODUCTION
The WDC CMOS W65C51N Asynchronous Communications Interface Adapter (ACIA) provides an easily
implemented, program controlled interface between 8-bit microprocessor based systems and serial
communication data sets and modems.
The ACIA has an internal baud rate generator. This feature eliminates the need for multiple component
support circuits, a crystal being the only other part required. The Transmitter baud rate can be selected
under program control to be either 1 of 15 different rates from 50 to 19,200 baud, or at 1/16 times an
external clock rate. The Receiver baud rate may be selected under program control to be either the
Transmitter rate or at 1/16 times the external clock rate. The ACIA has programmable word lengths of 5,
6, 7 or 8 bits; even, odd or no parity (Mark Parity only for Transmitter); 1, 1½ or 2 bit stops.
The ACIA is designed for maximum-programmed control from the microprocessor (MPU) to simplify
hardware implementation.
operating modes and data checking parameters and determine operational status.
The Command Register controls parity, receiver echo mode, transmitter interrupt control, the state of the
RTSB line, receiver interrupt control and the state of the DTRB line.
The Control Register controls the number of stop bits, word length, receiver clock source and baud rate.
The Status Register indicates the states of the IRQB, DSRB, and DCDB lines, Transmitter and Receiver
Data Registers and Overrun, Framing and Parity Error conditions.
The Transmitter and Receiver Data Registers are used for temporary data storage by the ACIA Transmit
and Receive circuits.
FEATURES
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Low power CMOS N-well silicon gate technology
Replacement for CMD / GTE / Harris / MOS Technology / GE / RCA / Synertek / Motorola /
Rockwell R6551, G65SC51, 65C51, 6551, CPD65C51, 6850
Full duplex operation with buffered receiver and transmitter
Data set/modem control functions
Internal baud rate generator with 15 programmable baud rates (50 to 19,200)
Program-selectable internally or externally controlled receiver rate
Programmable word lengths, number of stop bits and parity bit generation and detection
Programmable interrupt control
Program reset
Program-selectable serial echo mode
Two chip selects
5.0 VDC ± 5% supply requirements
28 pin plastic DIP package
32 pin LQFP package
Full TTL compatibility
Compatible with 65xx and 68xx microprocessors
Three separate registers permit the MPU to easily select the W65C51N
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