w65c51n Western Design Center, Inc., w65c51n Datasheet - Page 6

• Manufacturer Part Number: w65c51n
• Description: Asynchronous Communications Interface Adapter Acia
• Manufacturer: Western Design Center, Inc.

STATUS REGISTER
The Status Register indicates the state of interrupt conditions and other non-interrupt status lines. The
interrupt conditions are the Data Set Ready, Data Carrier Detect, Transmitter Data Register Empty and
Receiver Data Register Full as reported in bits 6 through 3, respectively. If any of these bits are set the
interrupt (IRQ) indicator (bit 7) is also set. Overrun, Framing Error and Parity Error are also reported (bits
2 through 0 respectively).
*No interrupt occurrs for these conditions
Reset Initialization
7
0
IRQ
-
7
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
6
-
-
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DSRB
5
-
-
6
4
1
-
Interrupt (IRQ)
No Interrupt
Interrupt has occurred
Data Set Ready (DSRB)
DSR low (ready)
DSR high (not ready)
Data Carrier Detect (DCDB)
DCD low (detected)
DCD high (not detected)
Transmitter Data Register Empty
Not Empty
Empty
Receiver Data Register Full
Not full
Full
Overrun*
No overrun
Overrun has occurred
Framing Error*
No framing error
Framing error detected
Parity Error*
No parity error
Parity error detected
DCDB
3
0
-
5
2
0
0
TDRE
4
1
0
-
0
0
-
RDRF
3
Hardware reset
Program reset
OVRN
2
FE
1
PE
0
6