SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 131

• Manufacturer Part Number: SDA9410-B13
• Description: Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
• Manufacturer: MICRONAS [Micronas]

SDA9410
131
Sub address 0A
Bit
D3...D2
D1...D0
Sub address 0B
Bit
D7
D6...D5
D4
D3
D2...D1
D0
Name
YPEAKM
CPEAKM
Name
x
FORMATM
FIEINVM
VCRMODEM
NAPIPPHM
(LSBs of
NAPLIPM)
TWOINM
Function
Vertical peaking factor for luminance signal master:
11: Factor 4
10: Factor 2
01: Factor 1
00: off
Vertical peaking factor for chrominance signal master:
11: Factor 4
10: Factor 2
01: Factor 1
00: off
Function
x
Input format master:
11: full CCIR 656
10: CCIR 656 only data, H- and V-sync according CCIR656
01: CCIR 656 only data, H- and V-sync according PAL/NTSC
00: 4:2:2
Field polarity inversion master:
1: Field A=1, Field B=0
0: Field A=0, Field B=1
Input filtering of the incoming field signal master:
1: on
0: off
Number of not active pixels from external HINM to the input data
in system clocks of CLKM:
Distance(HINM to input data) = (NAPIPDLM*4+NAPIPPHM+8)
[NAPIPPHM = 0]
Chrominance input format master:
1: 2’s complement input (-128...127)
0: unsigned input (0...255)
inside the SDA 9410 the data are always processed as
unsigned data
Preliminary Data Sheet
Micronas
I²C Bus