SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 85
SDA9410-B13
Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
1.SDA9410-B13.pdf
(179 pages)
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SDA9410
((A*)
displayed as line-scanning pattern ϒ
(A
The table below describes the different scan rate conversion algorithms and the
corresponding line-scanning pattern sequences. The delay between the input field and
the corresponding output fields depends on the OPDELM parameter and the default
value for the delay is an half input field.
Figure 40
85
n
B
n
n-1
, ϒ ) - Output signal, field A line-scanning pattern interpolated into field B at time n,
, ∼ + ϒΦ=ϑ= Output signal, frame AB at time n, progressive
the internal field stores
Fields available in
Input fields
time
Output fields
Explanation of operation mode timing
A
OPDELM lines
n-1
, B
A
n-1
n
Phase 2/0
c
n-1
B
n-1
, A
Phase 3/1
d
n
n-1
Output sync controller (OSCM/S)
B
n
Phase 0
a
n
A
n
Preliminary Data Sheet
, B
n
Phase 1
b
n
Micronas
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