SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 62

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SDA9410-B13

Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
SDA9410
Table 50
Table 51
Table 52
Table 53
62
ORGMEMS
0
1
MEMRDM
1
0
ORGMEMM
0
1
MEMRDS
1
0
Definition of ORGMEMM
Definition of ORGMEMS
Definition of MEMRDM
Definition of MEMRDS
Memory read mode slave channel
(SRC-Mode, MEMOP=00)
Reading data in PIP-configuration (joint line free, ABAB)
Reading data in SSC-configuration, 1 or 2 decimated fields, AABB
Memory read mode master channel
(SRC-Mode, MEMOP=00)
Reading only field memory area for AABB conversion
Reading both field memory areas for ABAB conversion
Data configuration of the memory (Slave Channel)
SRC mode, ORGMEMM=1: no slave channel available
SRC mode, ORGMEMM=0, SSC- and MUP-mode: 1 field is stored
SRC-mode: 3 fields are stored for PIP
SSC- and MUP-mode: 2 fields are stored
Data configuration of the memory (Master Channel)
SRC mode, ORGMEMM=1: no slave channel available
SRC mode, ORGMEMM=0, SSC- and MUP-mode: 1 field is stored
SRC-mode: 3 fields are stored for PIP
SSC- and MUP-mode: 2 fields are stored
Application modes and memory concept
Preliminary Data Sheet
Micronas

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