SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 159

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SDA9410-B13

Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
SDA9410
159
Sub address 55
Bit
D5
D4...D1
D0
Sub address 56
Bit
D7...D1
D0
Sub address 57
Bit
D7...D5
Name
RSHFTS
SHFTSTEP
MASTSLA Master / Slave Switch
Name
PROG_
THRES
MASLSHFT
Name
xxx
Function
Joint Line Free Display of Master and Slave Channel by Shifting
the Output Raster Phase (SSC-Mode, RSHFTM=1): Should be
set in all operation modes to 1
1: enabled
0: disabled
Increment for Raster Phase Shift per Output Frame (lines)
[SHFTSTEP=0100]
1: master and slave input signals are exchanged, reset of
display raster shift
0: display raster is synchronized to input Master Channel
(vertical Sync)
Function
Threshold to display progressive PIP without joint lines
[PROG_THRES=60]
Master / Slave Shift
1: display raster is shifted slave phase to prepare a master/
slave switch
0: display raster is synchronized to input Master Channel
(vertical Sync)
Function
xxx
Preliminary Data Sheet
Micronas
I²C Bus

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