SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 32

• Manufacturer Part Number: SDA9410-B13
• Description: Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
• Manufacturer: MICRONAS [Micronas]

SDA9410
5.4.2
The Figure 13 shows the block diagram of the VHCOMM and VHCOMS block. The
VHCOMM and VHCOMS block are able to compress the picture in horizontal and
vertical direction continuously. The minimal step size in vertical direction is two lines, the
minimal step size in horizontal direction is four pixels. The figure below shows also the
functionality and the formula, which shows the relation between the number of input lines
(pixels) and output lines (pixels). In horizontal direction an expansion is also possible.
Panorama mode in horizontal direction will be supported.
Figure 13
32
2*ALPFIPM,
2*ALPFIPS
lines
YUVIN
Vertical and horizontal compression (VHCOMM/VHCOMS)
CHFILM, CHFILS
DEZVM, DEZVS,
Number of output lines = (Number of input lines) * 512 / (512+INTVM) * 1/(DEZVM)
INTVM, INTVS,
Number of output lines = (Number of input lines) * 2 * 2048 / (INTHM) * 1/(DEZHM)
compression
Block diagram of VHCOMM/VHCOMS
Vertical
pixels (CLKM/2)
4*APPLIPM
4*APPLIPS
YPEAKM, CPEAKM,
YPEAKS, CPEAKS
peaking
Vertical
pixels (CLKM/2)
4*APPLIPM
4*APPLIPS
DEZHM, DEZHS
INTHM, INTHS,
compression/
Horizontal
expansion
2*ALPFM
2*ALPFS
lines
Input signal processing
Preliminary Data Sheet
DEZVM = {1, 2, 4, 8, 16}
INTHM = 2048, ... , 8191;
DEZHM = {1, 2, 4, 8, 16}
INTVM = 0, ..., 511;
pixels (CLKM/2)
4*APPLM
4*APPLS
Micronas
YUVOUT