S29CD-J_12 SPANSION [SPANSION], S29CD-J_12 Datasheet - Page 60

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S29CD-J_12

Manufacturer Part Number
S29CD-J_12
Description
Manufacturer
SPANSION [SPANSION]
Datasheet
18.3
Notes
1. Using the max t
2. Not 100% tested
3. Recommended 50% Duty Cycle
60
JEDEC
t
EHQZ
t
DF
Parameter
t
t
t
WADVH1
WADVH2
t
t
Synchronous Operations
WADVS
t
ADVCS
ADVCH
t
t
t
t
t
t
t
t
t
BACC
t
t
t
Std.
ADVP
t
CLKH
t
AAVS
AAVH
RSTZ
INDS
INDH
CLKL
IACC
BDH
t
t
t
OEZ
CEZ
CES
CLK
CR
OE
CF
AAVS
Burst Access Time Valid Clock to Output Delay
ADV# Setup Time to Rising Edge of CLK
ADV# Hold Time from Rising Edge of CLK
ADV# Pulse Width
Valid Data Hold from CLK
CLK to Valid IND/WAIT#
IND/WAIT# Hold from CLK
CLK to Valid Data Out, Initial Burst Access
CLK Period
CLK Rise Time
CLK Fall Time
CLK High Time
CLK Low Time
Output Enable to Output Valid
Output Enable to Output High-Z
Chip Enable to Output High-Z
CE# Setup Time to Clock
ADV# Falling Edge to Address Valid
Address Hold Time from Rising Edge of ADV#
RESET# Low to Output High-Z
ADV# Falling Edge to WE# Falling Edge
ADV# Rising Edge to WE# Rising Edge
WE# Rising Edge Setup to ADV# Falling Edge
and min t
ADVCS
specs together will result in incorrect data output.
(Note 2)
(Note 3)
(Note 2)
(Note 3)
Table 18.3 Burst Mode for 32 Mb and 16 Mb
(Note 2)
Description
(Note 2)
(Note 2)
(Note 2)
S29CD-J and S29CL-J Flash Family
(Note 2)
(Note 2)
(Note 1)
16 Mb
32 Mb
D a t a
Max
Max
Max
Max
Max
Max
Max
Max
Max
Max
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Max
Min
Min
Min
Min
S h e e t
75 MHz,
13.3
6.65
6.65
7.5
7.5
7.5
7.5
0R
48
8
2
0
2
2
4
S29CD-J_CL-J_00_B7 October 11, 2012
66 MHz,
15.15
Speed Options
8.5
6.8
6.8
0P
54
10
10
10
8
2
0
2
2
4
11.75
1.5
6.5
60
20
10
6
8
3
3
1
0
56 MHz,
17.85
0M
9.5
8.0
8.0
15
15
15
54
8
3
0
3
3
5
40 MHz,
0J/1J
11.25
11.25
10.5
54
25
17
17
17
8
3
0
3
3
6
cycle
Unit
CLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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