S29CD-J_12 SPANSION [SPANSION], S29CD-J_12 Datasheet - Page 76

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S29CD-J_12

Manufacturer Part Number
S29CD-J_12
Description
Manufacturer
SPANSION [SPANSION]
Datasheet
Legend
DYB = Dynamic Protection Bit
OW = Address (A5–A0) is (011X10).
PPB = Persistent Protection Bit
PWA = Password Address. A0 selects between the low and high 32-bit portions
of the 64-bit Password
PWD = Password Data. Must be written over two cycles.
PL = Password Protection Mode Lock Address (A5–A0) is (001X10)
RD(0) = Read Data DQ0 protection indicator bit. If protected, DQ0= 1, if
unprotected, DQ0 = 0.
RD(1) = Read Data DQ1 protection indicator bit. If protected, DQ1 = 1, if
unprotected, DQ1 = 0.
Notes
1. See
2. All values are in hexadecimal.
3. Shaded cells in table denote read cycles. All other cycles are write
4. During unlock cycles, (lower address bits are 555 or 2AAh as shown in table)
5. The reset command returns the device to reading the array.
6. The fourth cycle programs the addressed locking bit. The fifth and sixth
7. Data is latched on the rising edge of WE#.
76
Reset
Secured Silicon Sector Entry
Secured Silicon Sector Exit
Secured Silicon Protection
Bit Program (5, 6)
Secured Silicon Protection Bit
Status
Password Program (5, 7, 8)
Password Verify
Password Unlock (7, 8)
PPB Program (5, 6)
All PPB Erase (5, 9, 10)
PPB Status (11, 12)
PPB Lock Bit Set
PPB Lock Bit Status
DYB Write (7)
DYB Erase (7)
DYB Status (12)
PPMLB Program (5, 6)
PPMLB Status (5)
SPMLB Program (5, 6)
SPMLB Status (5)
operations.
address bits higher than A11 (except where BA is required) and data bits
higher than DQ7 are don’t cares.
cycles are used to validate whether the bit has been fully programmed. If DQ0
(in the sixth cycle) reads 0, the program command must be issued and
verified again.
Table 8.1
Command (Notes)
for description of bus operations.
1
6
6
4
4
5
6
6
4
4
4
4
4
6
6
6
6
3
4
3
Table 20.2 Sector Protection Command Definitions (x32 Mode)
Addr
XXX
555
555
555
555
555
555
555
555
555
555
555
555
555
555
555
555
555
555
555
First
Data
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
F0
S29CD-J and S29CL-J Flash Family
Addr
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
Second
Data
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
BA+555
BA+555
BA+555
Addr
555
555
555
555
555
555
555
555
555
555
555
555
555
555
555
555
D a t a
SA = Sector Address. The set of addresses that comprise a sector. The system
may write any address within a sector to identify that sector for a command.
SG = Sector Group Address
BA = Bank Address. The set of addresses that comprise a bank. The system may
write any address within a bank to identify that bank for a command.
SL = Persistent Protection Mode Lock Address (A5–A0) is (010X10)
WP = PPB Address (A5–A0) is (111010)
X = Don’t care
PPMLB = Password Protection Mode Locking Bit
SPMLB = Persistent Protection Mode Locking Bit
8. The entire four bus-cycle sequence must be entered for each portion of the
9. The fourth cycle erases all PPBs. The fifth and sixth cycles are used to
10. Before issuing the erase command, all PPBs should be programmed in order
11. In the fourth cycle, 00h indicates PPB set; 01h indicates PPB not set.
12. The status of additional PPBs and DYBs may be read (following the fourth
Third
password.
validate whether the bits have been fully erased. If DQ0 (in the sixth cycle)
reads 1, the erase command must be issued and verified again.
to prevent over-erasure of PPBs.
cycle) without reissuing the entire command sequence.
Data
C8
Bus Cycles (Notes 1–4)
88
90
60
60
38
28
60
60
90
78
58
48
48
58
60
60
60
60
S h e e t
PWA[0-1]
PWA[0-1]
PWA[0-1]
SA+X02
SG+WP
Addr
OW
OW
WP
XX
SA
SA
SA
SA
PL
PL
SL
SL
Fourth
PWD[0-1]
PWD[0-1]
PWD[0-1]
S29CD-J_CL-J_00_B7 October 11, 2012
RD(0)
RD(1)
RD(0)
RD(0)
RD(0)
00/01
Data
00
68
68
60
X1
X0
68
68
SG+WP
Addr
OW
WP
PL
SL
Fifth
Data
48
48
40
48
48
SG+WP
Addr
OW
WP
PL
SL
Sixth
RD(0)
RD(0)
RD(0)
RD(0)
RD(0)
Data

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