PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 40

• Manufacturer Part Number: PC87307VUL
• Description: PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
• Manufacturer: National Semiconductor

www.national.com
2.10.5 CS1 Base Address MSB Register, Second
This read/write register is reset by hardware to 00h. Same
as Plug and Play ISA base address register at index 60h.
See Table 2-7 on page 28.
2.10.6 CS1 Base Address LSB Register, Second Level
This read/write register is reset by hardware to 00h. Same
as Plug and Play ISA base address register at index 61h.
See Table 2-7 on page 28.
2.10.7 CS1 Configuration Register, Second Level
This read/write register is reset by hardware to 00h. It func-
tions like the CS0 Configuration Register described in Sec-
tion 2.10.3.
2.10.8 Reserved, Second Level Index 07h
Attempts to access this register produce undefined results.
2.10.9 CS2 Base Address MSB Register, Second
This read/write register is reset by hardware to 00h. It func-
tions like the Plug and Play ISA base address register at in-
dex 60h. See Table 2-7 on page 28.
2.10.10 CS2 Base Address LSB Register, Second Level
This read/write register is reset by hardware to 00h. It func-
tions like the Plug and Play ISA base address register at in-
dex 61h. See Table 2-7 on page 28.
0
7
FIGURE 2-15. CS1 Configuration Register Bitmap
0
Mask Address Pins A11-A0
6
Level Index 04h
Index 05h
Index 06h
Level Index 08h
Index 09h
Unaffected by RD/WR
0
5
Assert Chip Select Signal on Read
0
4
Assert Chip Select Signal on Write
0
3
Mask Address Pin A3
0
2
Mask Address Pin A2
0
1
Mask Address Pin A1
0
0
Reset
Required
Mask Address Pin A0
CS1 Configuration
Second Level
Index 06h
Register,
Configuration
40
2.10.11 CS2 Configuration Register, Second Level
This read/write register is reset by hardware to 00h. It func-
tions like the CS0 Configuration register.
2.10.12 Reserved, Second Level Indexes 0Bh-0Fh
Attempts to access these registers produce undefined re-
sults.
2.10.13 Not Accessible, Second Level Indexes 10h-FFh
Not accessible because bits 7-4 of the Index register are 0.
0
7
FIGURE 2-16. CS2 Configuration Register Bitmap
0
Mask Address Pins A11-A0
6
Index 0Ah
Unaffected by RD/WR
0
5
Assert Chip Select Signal on Read
0
4
Assert Chip Select Signal on Write
0
3
Mask Address Pin A3
0
2
Mask Address Pin A2
0
1
Mask Address Pin A1
0
0
Reset
Required
Mask Address Pin A0
CS2 Configuration
Second Level
Index 0Ah
Register,