PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 408

• Manufacturer Part Number: PIC18F13K50-E/P
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F1XK50/PIC18LF1XK50
T
T0CON Register ................................................................. 97
T1CON Register ............................................................... 101
T2CON Register ............................................................... 107
T3CON Register ............................................................... 109
Table Pointer Operations (table) ........................................ 50
Table Reads/Table Writes .................................................. 28
TBLRD ............................................................................. 341
TBLWT ............................................................................. 342
Thermal Considerations ................................................... 371
Time-out in Various Situations (table) .............................. 275
Timer0 ................................................................................ 97
Timer1 .............................................................................. 101
Timer2 .............................................................................. 107
Timer3 .............................................................................. 109
Timing Diagrams
DS41350C-page 406
Associated Registers ................................................. 99
Operation ................................................................... 98
Overflow Interrupt ...................................................... 99
Prescaler .................................................................... 99
Prescaler Assignment (PSA Bit) ................................ 99
Prescaler Select (T0PS2:T0PS0 Bits) ....................... 99
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode .............................. 98
Source Edge Select (T0SE Bit) .................................. 98
Source Select (T0CS Bit) ........................................... 98
Specifications ........................................................... 380
Switching Prescaler Assignment ................................ 99
16-Bit Read/Write Mode ........................................... 103
Associated Registers ............................................... 106
Interrupt .................................................................... 104
Operation ................................................................. 102
Oscillator .......................................................... 101, 103
Oscillator Layout Considerations ............................. 104
Overflow Interrupt .................................................... 101
Resetting, Using the CCP Special Event Trigger ..... 104
Specifications ........................................................... 380
TMR1H Register ...................................................... 101
TMR1L Register ....................................................... 101
Use as a Real-Time Clock ....................................... 105
Associated Registers ............................................... 108
Interrupt .................................................................... 108
Operation ................................................................. 107
Output ...................................................................... 108
16-Bit Read/Write Mode ........................................... 111
Associated Registers ............................................... 112
Operation ................................................................. 110
Oscillator .......................................................... 109, 111
Overflow Interrupt ............................................ 109, 111
Special Event Trigger (CCP) .................................... 112
TMR3H Register ...................................................... 109
TMR3L Register ....................................................... 109
A/D Conversion ........................................................ 382
Acknowledge Sequence .......................................... 170
Asynchronous Reception ......................................... 184
Asynchronous Transmission .................................... 180
Asynchronous Transmission (Back to Back) ........... 181
Auto Wake-up Bit (WUE) During Normal Operation 195
Auto Wake-up Bit (WUE) During Sleep ................... 195
Automatic Baud Rate Calculator .............................. 193
Baud Rate Generator with Clock Arbitration ............ 164
BRG Reset Due to SDA Arbitration During
Brown-out Reset (BOR) ........................................... 378
Start Condition ................................................. 173
Preliminary
Bus Collision During a Repeated Start Condition
Bus Collision During a Repeated Start Condition
Bus Collision During a Start Condition (SCL = 0) .... 173
Bus Collision During a Stop Condition (Case 1) ...... 175
Bus Collision During a Stop Condition (Case 2) ...... 175
Bus Collision During Start Condition (SDA only) ..... 172
Bus Collision for Transmit and Acknowledge .......... 171
CLKOUT and I/O ..................................................... 377
Clock Synchronization ............................................. 157
Clock Timing ............................................................ 373
Clock/Instruction Cycle .............................................. 29
Comparator Output .................................................. 219
Enhanced Capture/Compare/PWM (ECCP) ............ 381
Fail-Safe Clock Monitor (FSCM) ................................ 23
First Start Bit Timing ................................................ 165
Full-Bridge PWM Output .......................................... 122
Half-Bridge PWM Output ................................. 120, 127
I
I
I
I
I
I
I
I
I
I
I
I
Internal Oscillator Switch Timing ............................... 19
PWM Auto-shutdown
PWM Direction Change ........................................... 123
PWM Direction Change at Near 100% Duty Cycle .. 124
PWM Output (Active-High) ...................................... 118
PWM Output (Active-Low) ....................................... 119
Repeat Start Condition ............................................ 166
Reset, WDT, OST and Power-up Timer .................. 378
Send Break Character Sequence ............................ 196
Slave Synchronization ............................................. 141
Slow Rise Time (MCLR Tied to V
SPI Master Mode (CKE = 1, SMP = 1) .................... 385
SPI Mode (Master Mode) ......................................... 140
SPI Mode (Slave Mode, CKE = 0) ........................... 142
SPI Mode (Slave Mode, CKE = 1) ........................... 142
SPI Slave Mode (CKE = 0) ...................................... 386
SPI Slave Mode (CKE = 1) ...................................... 386
Synchronous Reception (Master Mode, SREN) ...... 201
Synchronous Transmission ..................................... 198
Synchronous Transmission (Through TXEN) .......... 198
Time-out Sequence on POR w/PLL Enabled
Time-out Sequence on Power-up (MCLR
Time-out Sequence on Power-up (MCLR
Time-out Sequence on Power-up (MCLR
Timer0 and Timer1 External Clock .......................... 380
Transition for Entry to Sleep Mode .......................... 233
2
2
2
2
2
2
2
2
2
2
2
2
C Bus Data ............................................................ 388
C Bus Start/Stop Bits ............................................ 387
C Master Mode (7 or 10-Bit Transmission) ........... 168
C Master Mode (7-Bit Reception) .......................... 169
C Slave Mode (10-Bit Reception, SEN = 0) .......... 152
C Slave Mode (10-Bit Reception, SEN = 1) .......... 159
C Slave Mode (10-Bit Transmission) .................... 153
C Slave Mode (7-bit Reception, SEN = 0) ............ 150
C Slave Mode (7-Bit Reception, SEN = 1) ............ 158
C Slave Mode (7-Bit Transmission) ...................... 151
C Slave Mode General Call Address Sequence
C Stop Condition Receive or Transmit Mode ........ 170
(Case 1) ........................................................... 174
(Case 2) ........................................................... 174
Auto-restart Enabled ........................................ 126
Firmware Restart ............................................. 126
(MCLR Tied to V
Not Tied to V
Not Tied to V
Tied to V
(7 or 10-Bit Address Mode) ............................ 160
T
PWRT
) ............................................................ 277
DD
, V
DD
DD
DD
, Case 1) ................................. 276
, Case 2) ................................. 276
© 2009 Microchip Technology Inc.
DD
Rise < T
) ........................................ 277
PWRT
DD
, V
) ..................... 276
DD
Rise >