MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 151

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

8.6.2 PLL Bandwidth Control Register
68HC908AZ32A — Rev 0.0
MOTOROLA
Address:
(PLLON = 0), selecting CGMVCLK requires two writes to the PLL control
register. See
PCTL3–PCTL0 — Unimplemented
The PLL bandwidth control register:
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
These bits provide no function and always read as logic 1s.
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For More Information On This Product,
Selects automatic or manual (software-controlled) bandwidth
control mode
Indicates when the PLL is locked
In automatic bandwidth control mode, indicates when the PLL is in
acquisition or tracking mode
In manual operation, forces the PLL into acquisition or tracking
mode
Figure 8-5. PLL Bandwidth Control Register (PBWC)
$001D
AUTO
Bit 7
0
Clock Generator Module (CGM)
Go to: www.freescale.com
Base Clock Selector Circuit
= Unimplemented
LOCK
6
0
ACQ
5
0
XLD
4
0
3
0
0
on page 145.
Clock Generator Module (CGM)
2
0
0
Advance Information
CGM Registers
1
0
0
Bit 0
0
0
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