MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 304

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MC68HC908AZ32ACFU

Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Timer Interface Module A (TIMA)
Advance Information
304
NOTE:
MSxA — Mode Select Bit A
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIMA status and control register
(TASC).
ELSxB and ELSxA — Edge/Level Select Bits
Freescale Semiconductor, Inc.
When ELSxB:A
operation or unbuffered output compare/PWM operation. See
18-2.
When ELSxB:A = 00, this read/write bit selects the initial output level
of the TACHx pin once PWM, output compare mode or input capture
mode is enabled. See
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port E or port F and pin PTEx/TACHx or pin PTFx/TACHx is
available as a general-purpose I/O pin. However, channel x is at a
state determined by these bits and becomes transparent to the
respective pin when PWM, input capture mode or output compare
operation mode is enabled.
work. Reset clears the ELSxB and ELSxA bits.
For More Information On This Product,
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
Timer Interface Module A (TIMA)
Go to: www.freescale.com
00, this read/write bit selects either input capture
Table
Table 18-2
18-2. Reset clears the MSxA bit.
shows how ELSxB and ELSxA
68HC908AZ32A — Rev 0.0
MOTOROLA
Table

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