MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 268

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MC68HC908AZ32ACFU

Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Serial Peripheral Interface (SPI)
17.13 I/O Signals
17.13.1 MISO (Master In/Slave Out)
Advance Information
268
Therefore, a write to the SPDR in break mode with the BCFE bit cleared
has no effect.
The SPI module has four I/O pins and shares three of them with a
parallel I/O port.
The SPI has limited inter-integrated circuit (I
software support) as a master in a single-master environment. To
communicate with I
when the SPWOM bit in the SPI control register is set. In I
communication, the MOSI and MISO pins are connected to a
bidirectional pin from the I
to V
MISO is one of the two SPI module pins that transmit serial data. In full
duplex operation, the MISO pin of the master SPI module is connected
to the MISO pin of the slave SPI module. The master SPI simultaneously
receives data on its MISO pin and transmits data from its MOSI pin.
Slave output data on the MISO pin is enabled only when the SPI is
configured as a slave. The SPI is configured as a slave when its
SPMSTR bit is logic 0 and its SS pin is at logic 0. To support a multiple-
slave system, a logic 1 on the SS pin puts the MISO pin in a high-
impedance state.
Freescale Semiconductor, Inc.
DD
For More Information On This Product,
MISO — Data received
MOSI — Data transmitted
SPSCK — Serial clock
SS — Slave select
V
.
SS
Serial Peripheral Interface (SPI)
— Clock ground
Go to: www.freescale.com
2
C peripherals, MOSI becomes an open-drain output
2
C peripheral and through a pullup resistor
2
C) capability (requiring
68HC908AZ32A — Rev 0.0
2
C
MOTOROLA

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