MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 331

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

68HC908AZ32A — Rev 0.0
MOTOROLA
NOTE:
MSxA — Mode Select Bit A
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIMB status and control register
(TBSC).
ELSxB and ELSxA — Edge/Level Select Bits
Freescale Semiconductor, Inc.
When ELSxB:A
operation or unbuffered output compare/PWM operation (see
19-2).
When ELSxB:A = 00, this read/write bit selects the initial output level
of the TBCHx pin once PWM, input capture or output compare
operation is enabled (see
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port F and pin PTFx/TBCHx is available as a general-purpose I/O
pin. However, channel x is at a state determined by these bits and
becomes transparent to the respective pin when PWM, input capture,
or output compare mode is enabled.
and ELSxA work. Reset clears the ELSxB and ELSxA bits.
For More Information On This Product,
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
Timer Interface Module B (TIMB)
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00, this read/write bit selects either input capture
Table
19-2). Reset clears the MSxA bit.
Table 19-2
Timer Interface Module B (TIMB)
shows how ELSxB
Advance Information
I/O Registers
Table
331