MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 306

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Timer Interface Module A (TIMA)
18.9.5 TIMA Channel Registers
Advance Information
306
CHxMAX — Channel x Maximum Duty Cycle Bit
These read/write registers contain the captured TIMA counter value of
the input capture function or the output compare value of the output
compare function. The state of the TIMA channel registers after reset is
unknown.
In input capture mode (MSxB–MSxA = 0:0) reading the high byte of the
TIMA channel x registers (TACHxH) inhibits input captures until the low
byte (TACHxL) is read.
In output compare mode (MSxB–MSxA 0:0) writing to the high byte of
the TIMA channel x registers (TACHxH) inhibits output compares and
the CHxF bit until the low byte (TACHxL) is written.
PTEx/TCHx
CHxMAX
Freescale Semiconductor, Inc.
When the TOVx bit is at logic 1, setting the CHxMAX bit forces the
duty cycle of buffered and unbuffered PWM signals to 100%. As
Figure 18-8
set or cleared. The output stays at the 100% duty cycle level until the
cycle after CHxMAX is cleared.
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Timer Interface Module A (TIMA)
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shows, the CHxMAX bit takes effect in the cycle after it is
COMPARE
PERIOD
OUTPUT
Figure 18-8. CHxMAX Latency
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COMPARE
OUTPUT
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COMPARE
OUTPUT
68HC908AZ32A — Rev 0.0
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COMPARE
OUTPUT
MOTOROLA
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