MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 284

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Timer Interface Module A (TIMA)
Advance Information
284
The result obtained by an input capture will be two more than the value
of the free-running counter on the rising edge of the internal bus clock
preceding the external transition. This delay is required for internal
synchronization.
The free-running counter contents are transferred to the TIMA channel
register (TACHxH–TACHxL see
on each proper signal transition regardless of whether the TIMA channel
flag (CH0F–CH5F in TASC0–TASC5 registers) is set or clear. When the
status flag is set, a CPU interrupt is generated if enabled. The value of
the count latched or “captured” is the time of the event. Because this
value is stored in the input capture register 2 bus cycles after the actual
event occurs, user software can respond to this event at a later time and
determine the actual time of the event. However, this must be done prior
to another input capture on the same pin; otherwise, the previous time
value will be lost.
By recording the times for successive edges on an incoming signal,
software can determine the period and/or pulse width of the signal. To
measure a period, two successive edges of the same polarity are
captured. To measure a pulse width, two alternate polarity edges are
captured. Software should track the overflows at the 16-bit module
counter to extend its range.
Another use for the input capture function is to establish a time
reference. In this case, an input capture function is used in conjunction
with an output compare function. For example, to activate an output
signal a specified number of clock cycles after detecting an input event
(edge), use the input capture function to record the time at which the
edge occurred. A number corresponding to the desired delay is added to
this captured value and stored to an output compare register (see
Channel Registers
output compares are referenced to the same 16-bit modulo counter, the
delay can be controlled to the resolution of the counter independent of
software latencies.
Reset does not affect the contents of the TIMA channel register
(TACHxH–TACHxL).
Freescale Semiconductor, Inc.
For More Information On This Product,
Timer Interface Module A (TIMA)
Go to: www.freescale.com
on page 306). Because both input captures and
TIMA Channel Registers
68HC908AZ32A — Rev 0.0
on page 306)
MOTOROLA
TIMA