MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 340
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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Programmable Interrupt Timer (PIT)
Advance Information
340
NOTE:
NOTE:
POIE — PIT Overflow Interrupt Enable Bit
PSTOP — PIT Stop Bit
Do not set the PSTOP bit before entering wait mode if the PIT is required
to exit wait mode.
PRST — PIT Reset Bit
Setting the PSTOP and PRST bits simultaneously stops the PIT counter
at a value of $0000.
Freescale Semiconductor, Inc.
writing logic 0 to POF has no effect. Therefore, a POF interrupt
request cannot be lost due to inadvertent clearing of POF. Reset
clears the POF bit. Writing a logic 1 to POF has no effect.
This read/write bit enables PIT overflow interrupts when the POF bit
becomes set. Reset clears the POIE bit.
This read/write bit stops the PIT counter. Counting resumes when
PSTOP is cleared. Reset sets the PSTOP bit, stopping the PIT
counter until software clears the PSTOP bit.
Setting this write-only bit resets the PIT counter and the PIT prescaler.
Setting PRST has no effect on any other registers. Counting resumes
from $0000. PRST is cleared automatically after the PIT counter is
reset and always reads as logic zero. Reset clears the PRST bit.
For More Information On This Product,
1 = PIT counter has reached modulo value
0 = PIT counter has not reached modulo value
1 = PIT overflow interrupts enabled
0 = PIT overflow interrupts disabled
1 = PIT counter stopped
0 = PIT counter active
1 = Prescaler and PIT counter cleared
0 = No effect
Programmable Interrupt Timer (PIT)
Go to: www.freescale.com
68HC908AZ32A — Rev 0.0
MOTOROLA
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