MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 373

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

23.5.2 Data Direction Register C
68HC908AZ32A — Rev 0.0
MOTOROLA
NOTE:
Address:
Data direction register C determines whether each port C pin is an input
or an output. Writing a logic 1 to a DDRC bit enables the output buffer for
the corresponding port C pin; a logic 0 disables the output buffer.
MCLKEN — MCLK Enable Bit
DDRC[5:0] — Data Direction Register C Bits
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Figure 23-10
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This read/write bit enables MCLK to be an output signal on PTC2. If
MCLK is enabled, DDRC2 has no effect. Reset clears this bit.
These read/write bits control port C data direction. Reset clears
DDRC[7:0], configuring all port C pins as inputs.
For More Information On This Product,
1 = MCLK output enabled
0 = MCLK output disabled
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
MCLKEN
$0006
Bit 7
R
0
Figure 23-9. Data Direction Register C (DDRC)
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shows the port C I/O logic.
= Reserved
R
6
0
0
I/O Ports
DDRC5
5
0
DDRC4
4
0
DDRC3
3
0
DDRC2
2
0
Advance Information
DDRC1
1
0
I/O Ports
DDRC0
Bit 0
Port C
0
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