HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 106

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 2 CPU
2.9.4
The external address space is accessed with an 8-bit or 16-bit data bus width in a two-state or
three-state bus cycle. In three-state access, wait states can be inserted. For further details, refer to
section 6, Bus Controller.
2.10
2.10.1
Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction. The TAS
instruction is not generated by the Renesas H8S and H8/300 Series C/C++ compilers. If the TAS
instruction is used as a user-defined intrinsic function, ensure that only register ER0, ER1, ER4, or
ER5 is used.
Rev.6.00 Sep. 27, 2007 Page 76 of 1268
REJ09B0220-0600
External Address Space Access Timing
Usage Note
TAS Instruction
φ
Address bus
AS
RD
HWR, LWR
Data bus
Figure 2.17 Pin States during On-Chip Supporting Module Access
T
High-impedance state
1
Unchanged
Bus cycle
High
High
High
T
2

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