HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 349

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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8.2.7
The DTC enable registers comprise six 8-bit readable/writable registers, DTCERA to DTCERF,
with bits corresponding to the interrupt sources that can activate the DTC. These bits enable or
disable DTC service for the corresponding interrupt sources.
The DTC enable registers are initialized to H'00 by a reset and in hardware standby mode.
Bit n—DTC Activation Enable (DTCEn)
Bit n
DTCEn
0
1
A DTCE bit can be set for each interrupt source that can activate the DTC. The correspondence
between interrupt sources and DTCE bits is shown in table 8.5, together with the vector numbers
generated by the interrupt controller.
For DTCE bit setting, read/write operations must be performed using bit-manipulation instructions
such as BSET and BCLR. For the initial setting only, however, when multiple activation sources
are set at one time, it is possible to disable interrupts and write after executing a dummy read on
the relevant register.
Bit
Initial value :
R/W
DTC Enable Registers (DTCER)
Description
DTC activation by this interrupt is disabled
[Clearing conditions]
DTC activation by this interrupt is enabled
[Holding condition]
When the DISEL bit is 0 and the specified number of transfers have not ended
:
:
When the DISEL bit is 1 and the data transfer has ended
When the specified number of transfers have ended
DTCE7
R/W
7
0
DTCE6
R/W
6
0
DTCE5
R/W
5
0
DTCE4
R/W
4
0
Rev.6.00 Sep. 27, 2007 Page 319 of 1268
DTCE3
R/W
3
0
Section 8 Data Transfer Controller
DTCE2
R/W
2
0
DTCE1
REJ09B0220-0600
R/W
1
0
(Initial value)
(n = 7 to 0)
DTCE0
R/W
0
0

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