HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 229

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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6.6.2
When DRAM space is accessed in DMAC single address mode, full access (normal access) is
always performed. The DACK output goes low from the T
interface.
In modes other than DMAC single address mode, burst access can be used when accessing DRAM
space.
Figure 6.29 shows the DACK output timing for the DRAM interface when DDS = 0.
Figure 6.29 DACK Output Timing when DDS = 0 (Example of DRAM Access)
When DDS = 0
Read
Write
Note: n = 2 to 5
LCAS (LCAS)
CAS (UCAS)
CSn (RAS)
HWR (WE)
HWR (WE)
D
D
A
15
15
23
DACK
to D
to D
to A
φ
0
0
0
T
p
Row
T
r
Rev.6.00 Sep. 27, 2007 Page 199 of 1268
r
state in the case of the DRAM
T
c1
Column
T
Section 6 Bus Controller
c2
REJ09B0220-0600

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