HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 217

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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6.5.7
When DRAM is accessed, an RAS precharging time must be secured. With the chip, one T
is always inserted when DRAM space is accessed. This can be changed to two T
the TPC bit in MCR to 1. Set the appropriate number of T
connected and the operating frequency of the chip. Figure 6.16 shows the timing when two T
states are inserted.
When the TCP bit is set to 1, two T
Read
Write
Note: n = 2 to 5
Precharge State Control
CAS, LCAS
CSn (RAS)
HWR (WE)
HWR (WE)
D
A
D
15
23
15
to D
to D
to A
φ
0
0
0
Figure 6.16 Timing with 2-State Precharge Cycle
T
p1
p
states are also used for refresh cycles.
T
p2
Rev.6.00 Sep. 27, 2007 Page 187 of 1268
Row
T
p
r
cycles according to the DRAM
Column
T
c1
Section 6 Bus Controller
REJ09B0220-0600
p
states by setting
T
c2
p
state
p

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