HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 1123
HD6412320
Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412320.pdf
(1302 pages)
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TCR5—Timer Control Register 5
Bit
Initial value
Read/Write
:
:
:
—
—
7
0
Note: * Synchronous operation setting is performed by setting
Counter Clear
0
1
CCLR1
R/W
0
1
0
1
6
0
the SYNC bit in TSYR to 1.
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation*
CCLR0
R/W
5
0
Note: This setting is ignored when channel
Clock Edge
CKEG1
0
1
R/W
4
0
5 is in phase counting mode.
—
0
1
Count at rising edge
Count at falling edge
Count at both edges
CKEG0
R/W
3
0
Note:
Time Prescaler
Rev.6.00 Sep. 27, 2007 Page 1093 of 1268
H'FEA0
0
1
TPSC2
R/W
0
1
0
1
This setting is ignored when channel 5 is in phase
counting mode.
2
0
0
1
0
1
0
1
0
1
Appendix B Internal I/O Registers
Internal clock: counts on φ /1
Internal clock: counts on φ /4
Internal clock: counts on φ /16
Internal clock: counts on φ /64
External clock: counts on TCLKA pin input
External clock: counts on TCLKC pin input
Internal clock: counts on φ /256
External clock: counts on TCLKD pin input
TPSC1
R/W
1
0
TPSC0
R/W
0
0
REJ09B0220-0600
TPU5
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