HYB18T512160A Infineon Technologies AG, HYB18T512160A Datasheet - Page 18

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HYB18T512160A

Manufacturer Part Number
HYB18T512160A
Description
512-Mbit Double-Data-Rate-Two SDRAM
Manufacturer
Infineon Technologies AG
Datasheet

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Part Number
Manufacturer
Quantity
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Part Number:
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Manufacturer:
Infineon
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1.7
Figure 4
Notes
1. 64Mbit x 4 Organisation with 14 Row, 2 Bank and
2. This Functional Block Diagram is intended to
Data Sheet
11 Column External Addresses
facilitate user understanding of the operation of the
Block Diagrams
Block Diagram 32 Mbit
Row-Address MUX
Row-Address Latch
& Decoder
4 I/O
Bank0
Read Latch
Drivers
4 Internal Memory Banks
18
Refresh Counter
Bank Control Logic
Address Register
3. DM is a unidirectional signal (input only), but is
512-Mbit Double-Data-Rate-Two SDRAM
device; it does not represent an actual circuit
implementation.
internally loaded to match the load of the
bidirectional DQ and DQS signals.
HYB18T512[400/800/160]A[C/F]–[3.7/5]
Receivers
09112003-SDM9-IQ3P
Rev. 1.13, 2004-05
MPBT0040
Overview

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