HYB18T512160A Infineon Technologies AG, HYB18T512160A Datasheet - Page 87

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HYB18T512160A

Manufacturer Part Number
HYB18T512160A
Description
512-Mbit Double-Data-Rate-Two SDRAM
Manufacturer
Infineon Technologies AG
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HYB18T512160AF
Manufacturer:
Infineon
Quantity:
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Manufacturer:
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Figure 71
Note: DQS, DQS signals must be monotonic between
Data Sheet
Slew Rate Definition Tangent Diagram for
V REF
V IH (ac)
V
V
V IL (ac)
V SS
V DDQ
IH (dc)
IL (dc)
CK,DQS
max
max
CK,DQS
min
min
Nominal
line
Reference Loads, Setup & Hold Timing Definition and Slew Rate Derating
VREF to ac
region
Delta TF
Setup Slew Rate
Setup Slew Rate
Falling Signal
Rising Signal
t IS ,t DS
Tangent
=
=
V
line
87
tangent line [VIH(ac)min - VREF(dc)]
IL(dc)max
tangent line [VREF(dc) - VIL(ac)max]
Nominal
line
t
IS
(
512-Mbit Double-Data-Rate-Two SDRAM
t
DS
HYB18T512[400/800/160]A[C/F]–[3.7/5]
and
t
IH ,t DH
)
Delta TR
Delta TF
Delta TR
V
IH(dc)min
t
IS
Tangent
,t
DS
line
.
t IH ,t DH
VREF to ac
region
09112003-SDM9-IQ3P
Rev. 1.13, 2004-05

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