AK4691EG AKM [Asahi Kasei Microsystems], AK4691EG Datasheet - Page 33

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AK4691EG

Manufacturer Part Number
AK4691EG
Description
4ch ADC + 2ch DAC with MIC/HP/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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2. MIX-Amp
3. Polarity
4. Mono Analog Loopback Selector
5. MONO Mode
MS0672-E-00
When Pre-Amp gain is +18dB, +20dB, +24dB or +28dB, signal from Lch Pre-Amp #1 (MICL1 bit), Rch Pre-Amp #1
(MICR1 bit), and Lch Pre-Amp #2 (MICL2 bit) can be output from the LOUT pin. This path does not pass through the
block of MIC sensitivity compensation. MICL1 bit is enabled at PMMICL1 = PMLO bits = “1”. MICR1 bit is enabled
at PMMICR1 = PMLO bits = “1”. MICL2 bit is enabled at PMMICL2 = PMLO bits = “1”.
MIX1-Amp is powered-up when PMADC1 bit = “1”. MIX-Amp mixes the MIC input and the line input. Mixing ratio
is “1:0.6” at FB bit = “0” and “1.67:1” at FB bit = “1”.
INTL1/INTR1, INTL2/INTR2, EXTL1/EXTR1, EXTL2/EXTR2, and LIN/RIN pins output non-inverted input signals
from ADC.
ADC1 and ADC2 support mono data output. The both output mode of ADC1 and ADC2 are selected by ADM1-0 bits.
This conversion to mono data from stereo data is done before window noise reduction circuit
After setting ADM1-0 bits, ADC should be power-up by setting PMADC1 bit = “1” or PMADC2 bit = “1”. When
changing ADM1-0 bits during ADC is working, the pop noise may occur.
ADM1 bit
0
0
1
1
From Lch Pre-Amp #1
From Rch Pre-Amp #1
From Lch Pre-Amp #2
EXTL2/EXTR2
EXTL2/EXTR2
Figure 24. Mono Analog Loopback Selector
INTL1/INTR1
INTL2/INTR2
ADM0 bit
Table 20. Polarity of Recording Block
LIN/RIN
0
1
0
1
Signal Path
Table 21. ADC output data
ADC1
MICL1 bit
MICR1 bit
MICL2 bit
Lch Data
Lch Data
Rch Data
(L+R)/2
ADC1
ADC2
ADC1
ADC2
- 33 -
Lch
ADC output
Non-inverted
Non-inverted
Non-inverted
Polarity
Rch Data
Rch Data
Lch Data
(L+R)/2
Rch
To LOUT
(default)
(Figure
25).
[AK4691]
2007/11

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