AK4691EG AKM [Asahi Kasei Microsystems], AK4691EG Datasheet - Page 41

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AK4691EG

Manufacturer Part Number
AK4691EG
Description
4ch ADC + 2ch DAC with MIC/HP/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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2. ALC Recovery Operation
The ALC recovery operation waits for the WTM2-0 bits
If the input signal does not exceed “ALC recovery waiting counter reset level”
recovery operation is executed. The IVL and IVR values are automatically incremented by RGAIN1-0 bits
to the set reference level
Then the IVL and IVR are set to the same value for both channels. The ALC recovery operation period is set by WTM2-0
bits. When zero cross is detected at both channels during the wait period set by WTM2-0 bits, the ALC recovery operation
waits until WTM2-0 period and the next recovery operation is executed.
For example, when the current IVOL value is 30H and RGAIN1-0 bits are set to “01”, IVOL is changed to 32H by the
auto limiter operation and then the input signal level is gained by 0.75dB (=0.375dB x 2). When the IVOL value exceeds
the reference level (REF7-0 bits), the IVOL values are not increased.
When
during the ALC recovery operation, the waiting timer of ALC recovery operation is reset. When
the waiting timer of ALC recovery operation starts.
The ALC operation corresponds to the impulse noise. When the impulse noise is input, the ALC recovery operation
becomes faster than a normal recovery operation (Fast Recovery Operation). When large noise is input to microphone
instantaneously, the quality of small signal level in the large noise can be improved by this fast recovery operation. The
speed of fast recovery operation is set by RFST1-0 bits
MS0672-E-00
“ALC recovery waiting counter reset level (LMTH1-0) ≤ Output Signal < ALC limiter detection level (LMTH1-0)”
“ALC recovery waiting counter reset level (LMTH1-0) > Output Signal”,
WTM2
bit
0
0
0
0
1
1
1
1
WTM1
bit
0
0
1
1
0
0
1
1
(Table
RGAIN1 bit
WTM0
0
0
1
1
31) with zero crossing detection which timeout period is set by ZTM1-0 bits
bit
Table 29. ALC Recovery Operation Waiting Period
0
1
0
1
0
1
0
1
RGAIN0 bit
Table 30. ALC Recovery GAIN Step
16384/fs
1024/fs
2048/fs
4096/fs
8192/fs
128/fs
256/fs
512/fs
0
1
0
1
(Table
(Table
- 41 -
ALC Recovery Operation Waiting Period
1024ms
2048ms
1 step
2 step
3 step
4 step
128ms
256ms
512ms
8kHz
16ms
32ms
64ms
32).
GAIN STEP
29) to be set after completing the ALC limiter operation.
0.375dB
0.750dB
1.125dB
1.500dB
32kHz
128ms
256ms
512ms
16ms
32ms
64ms
4ms
8ms
(Table
(default)
26) during the wait time, the ALC
170.7ms
341.3ms
10.7ms
21.3ms
42.7ms
85.3ms
48kHz
2.7ms
5.3ms
(default)
(Table
(Table
[AK4691]
2007/11
30) up
28).

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