AK4691EG AKM [Asahi Kasei Microsystems], AK4691EG Datasheet - Page 54

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AK4691EG

Manufacturer Part Number
AK4691EG
Description
4ch ADC + 2ch DAC with MIC/HP/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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2. LMODE bit = “0” (When Line input and Line output are used as a common connector.)
When PMLO bit bit = “0”, the stereo line output enters power-down mode and the output becomes Hi-Z status. When the
LOPS bit is “1”, stereo line output (LOUT/ROUT pins) enters power-save mode and outputs LVCM voltage via an
internal resistor (typ. 200kΩ). In power-save mode, the signal path of stereo line output (DACL, BEEPL, MICL1,
MICL2, and MICR1 bits) is OFF. Pop noise can be decreased by using power-save mode. When using line input, the
AK4691 should be in the power-save mode.
MS0672-E-00
Figure 36. Connection Example (When Line input and Line output are used as a common connector.)
Connector
PMLO bit
Table 47. External Circuit for Stereo Line Output @ LMODE bit = “0” (x: Don’t care)
0
1
6.2kΩ
LOPS bit
(ROUT pin)
LOUT pin
x
1
0
(RIN pin)
6.2kΩ
LIN pin
From Pre-Amp1
Normal Operation
typ.200kΩ
Power-down
Power-save
Mode
Power-save Mode
- 54 -
typ. 60kΩ
typ.100kΩ
AIN bit = “1”
PRE bit = “0”
LVCM
LOUT/ROUT pins
Normal Operation
typ.60kΩ /100kΩ
VCOM
LVCM
Hi-Z
-
+
MIX-Amp
(default)
To ADC1
[AK4691]
2007/11

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