AK4691EG AKM [Asahi Kasei Microsystems], AK4691EG Datasheet - Page 46

• Manufacturer Part Number: AK4691EG
• Description: 4ch ADC + 2ch DAC with MIC/HP/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

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The input digital volume becomes a manual mode when ALC bit is “0”. This mode is for the case shown below. The
volume setting is common to ADC1 and ADC2 and has two tables that are LINE and MIC.
IVL7-0 and IVR7-0 bits set the gain of the volume control
timeout. Zero crossing timeout period is set by ZTM1-0 bits. If IVL7-0 or IVR7-0 bits are written during PMADC1 =
PMADC2 = PMDAC bits = “0”, IVOL operation starts with the written values at the end of the ADC/DAC initialization
cycle after PMADC1, PMADC2, or PMDAC bit is changed to “1”.
Even if the path is switched from recording to playback, the register setting of IVL/R remains. Therefore, IVL7-0 and
IVR7-0 bits should be set to “91H” (0dB) at GSEL bit = “0”.
MS0672-E-00
Input Digital Volume (Manual Mode)
1. After exiting reset state, when setting up the registers for the ALC operation (ZTM1-0, LMTH1-0 and etc)
2. When the registers for the ALC operation (Limiter period, Recovery period and etc) are changed.
3. When IVOL is used as a manual volume.
For example; when the change of the sampling frequency.
IVR7-0 bits
IVL7-0 bits
DFH
EFH
F1H
F0H
E2H
E1H
E0H
04H
03H
02H
01H
00H
:
:
Table 36. Input Digital Volume Setting
(GSEL bit = “0”)
+35.625
+30.375
+29.625
-52.875
-53.625
+35.25
+29.25
MUTE
-53.25
+36.0
+30.0
-54.0
MIC
:
:
- 46 -
(Table
GAIN(dB)
36). The IVOL value is changed at zero crossing or
(GSEL bit = “1”)
-82.875
-83.625
+5.625
+0.375
MUTE
-0.375
-83.25
+5.25
LINE
-0.75
-84.0
+6.0
0
:
:
(default)
[AK4691]
2007/11