TFRA08C13-DB AGERE [Agere Systems], TFRA08C13-DB Datasheet - Page 151

• Manufacturer Part Number: TFRA08C13-DB
• Description: TFRA08C13 OCTAL T1/E1 Framer
• Manufacturer: AGERE [Agere Systems]

Preliminary Data Sheet
October 2000
Lucent Technologies Inc.
Lucent Technologies Inc.
Framer Register Architecture
Secondary Loopback Control and ID and Address (FRM_PR25)
This register allows for a second single-time-slot loopback mode. This loopback is valid if the secondary time slot
loopback address is different from the primary loopback address and the device is not in a line, board, or payload
loopback, see FRM_PR24. This register contains the secondary loopback mode control and the 5-bit address for
the secondary line or system time slot to be looped back to the line or system. The default value is 00 (hex) (no
loopback).
Table 134. Secondary Time-Slot Loopback Address Register (FRM_PR25) (Y79)
Table 135. Loopback Decoding of Bits LBC[1:0] in FRM_PR25, Bits 6—5
0—4
5—6
LBC1
Bit
7
0
0
1
1
STSL BA0—S TSLBA4
SLBC0—SLBC1
LBC0
0
1
0
1
Symbol
—
No Loopback.
Secondary Single Time-Slot System Loopback.
Secondary Single Time-Slot Line Loopback.
Reserved.
Secondary Time-Slot Loopback Address.
Secondary Loopback Control Bits[1:0].
Reserved. Wri te to 0 .
(continued)
Function
Description
TFRA08C13 OCTAL T1/E1 Framer
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