MT55L256L36P MICRON [Micron Technology], MT55L256L36P Datasheet - Page 17
MT55L256L36P
Manufacturer Part Number
MT55L256L36P
Description
8Mb ZBT SRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
1.MT55L256L36P.pdf
(30 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
NOTE: 1. A STALL or IGNORE CLOCK EDGE cycle is not shown in the above diagram. This is because CKE# HIGH only blocks the
8Mb: 512K x 18, 256K x 32/36 Pipelined ZBT SRAM
MT55L512L18P_2.p65 – Rev. 6/01
KEY:
2. States change on the rising edge of the clock (CLK).
clock (CLK) input and does not change the state of the device.
READ
BURST
COMMAND
DS
READ
WRITE
BURST
READ
DS
BURST
BEGIN
READ
READ
OPERATION
DESELECT
New READ
New WRITE
BURST READ,
BURST WRITE or
CONTINUE DESELECT
STATE DIAGRAM FOR ZBT SRAM
BURST
DESELECT
WRITE
READ
DS
17
8Mb: 512K x 18, 256K x 32/36
BURST
BURST
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BURST
WRITE
WRITE
BEGIN
PIPELINED ZBT SRAM
WRITE
DS
WRITE
BURST
©2001, Micron Technology, Inc.