XRT83VSH28ES Exar, XRT83VSH28ES Datasheet - Page 67

• Manufacturer Part Number: XRT83VSH28ES
• Description: Peripheral Drivers & Components - PCIs 8 CH E1 LIU SH (low cost version)
• Manufacturer: Exar

Specifications of XRT83VSH28ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 2.0.0
R
EGISTER
D[5:0]
B
D7
D6
IT
0
B
X
D7
D6
D5
D4
D3
D2
D1
D0
IT
81
A
#
H
DDRESS
TxONCNTL Transmit On Control
TERCNTL Receive Termination Select Control
Reserved
N
AME
Reserved
Reserved
Reserved
Reserved
Reserved
RXMUTE
EXLOS
N
T
T
ICT
ABLE
AME
ABLE
This register bit grants access to controlling the state of the trans-
mitter outputs.
0 = Control comes from the TxON Register Bits
1 = Control comes from the TxON Hardware Pins
This bit sets the LIU to control the RxTSEL function with either the
individual channel register bit or the global hardware pin.
0 = Control of the receive termination is set to the register bits
1 = Control of the receive termination is set to the RxTSEL hard-
ware pin
These Register Bits are Not Used
31: M
32: M
Receive Output Mute: Writing a “1” to this bit, mutes receive
outputs at RPOS/RDATA and RNEG/LCV pins to a “0” state for
any channel that detects an RLOS condition.
N
Extended LOS: Writing a “1” to this bit extends the number of
zeros at the receive input of each channel before RLOS is
declared to 4096 bits. Writing a “0” reverts to the normal mode
(32 bits for E1).
In-Circuit-Testing: Writing a “1” to this bit configures all the
output pins of the chip in high impedance mode for In-Circuit-
Testing. Setting the ICT bit to “1” is equivalent to connecting
the Hardware ICT pin 88 to ground.
OTE
ICROPROCESSOR
ICROPROCESSOR
: RCLK is not muted.
G
LOBAL
F
R
UNCTION
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
EGISTER
R
R
64
EGISTER
EGISTER
F
UNCTION
(0
X
0
82
0
X
X
81
H
82
)
H
H
, B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
Register
Type
R/W
R/W
R/W
R
XRT83VSH28
EGISTER
T
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
YPE
(HW reset)
Default
Value
R
V
ALUE
0
0
0
ESET
0
0
0
0
0
0
0
0