XRT83VSH28ES Exar, XRT83VSH28ES Datasheet - Page 8

• Manufacturer Part Number: XRT83VSH28ES
• Description: Peripheral Drivers & Components - PCIs 8 CH E1 LIU SH (low cost version)
• Manufacturer: Exar

Specifications of XRT83VSH28ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83VSH28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
PIN DESCRIPTION BY FUNCTION
RECEIVE SECTION
S
RNEG/LCV0
RNEG/LCV1
RNEG/LCV2
RNEG/LCV3
RNEG/LCV4
RNEG/LCV5
RNEG/LCV6
RNEG/LCV7
IGNAL
RPOS0
RPOS1
RPOS2
RPOS3
RPOS4
RPOS5
RPOS6
RPOS7
RLOS0
RLOS1
RLOS2
RLOS3
RLOS4
RLOS5
RLOS6
RLOS7
RCLK0
RCLK1
RCLK2
RCLK3
RCLK4
RCLK5
RCLK6
RCLK7
RXON
N
AME
L
BGA
EAD
H15
H16
M15
U16
H18
M16
D15
K16
A16
T15
A17
B16
V17
B17
T17
J15
L17
C3
H4
H3
U3
H2
M4
G2
U2
M3
V3
B3
A2
T4
B2
L2
L3
#
T
YPE
O
O
O
O
I
Receiver On
Hardware Mode Only
This pin is used to enable the receivers for all channels. By default, the receivers
are turned ON in hardware mode. To turn the receivers OFF, pull this pin "Low".
N
Receive Loss of Signal
When a receive loss of signal occurs according to ITU-T G.775, the RLOS pin will go
"High" for a minimum of one RCLK cycle. RLOS will remain "High" until the loss of
signal condition clears. See the Receive Loss of Signal section of this datasheet for
more details.
N
Receive Clock Output
RCLK is the recovered clock from the incoming data stream. If the incoming signal
is absent or RTIP/RRING are in "High-Z", RCLK maintains its timing by using an
internal master clock as its reference. RPOS/RNEG data can be updated on either
edge of RCLK selected by RCLKE.
N
RNEG/LCV_OF Output
In dual rail mode, this pin is the receive negative data output. In single rail mode,
this pin is a Line Code Violation / Counter Overflow indicator. If LCV is selected by
programming the appropriate global register and if a line code violation, a bi-polar
violation, or excessive zeros occur, the LCV pin will pull "High" for a minimum of one
RCLK cycle. LCV will remain "High" until there are no more violations. However, if
OF (Overflow) is selected the LCV pin will pull "High" if the internal LCV counter is
saturated. The LCV pin will remain "High" until the LCV counter is reset.
RPOS/RDATA Output
Receive digital output pin. In dual rail mode, this pin is the receive positive data out-
put. In single rail mode, this pin is the receive non-return to zero (NRZ) data output.
OTE
OTE
OTE
: Internally pulled "High" with a 50k
: This pin can be used for redundancy applications to initiate an automatic
: RCLKE is a global setting that applies to all 8 channels.
switch to a backup card.
5
D
ESCRIPTION

resistor.
REV. 2.0.0