ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 33

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

determined by their negative-to-positive transitions. The regular
succession of these zero-crossing events is Phase A followed by
Phase B followed by Phase C (see Figure 44). If the sequence of
zero-crossing events is, instead, Phase A followed by Phase C
followed by Phase B, then Bit 19 (SEQERR) in the STATUS1
register is set.
If Bit 19 (SEQERR) in the MASK1 register is set to 1 and a
phase sequence error event is triggered, the IRQ1 interrupt pin
is driven low. The status bit is cleared and the IRQ1 pin is set
high by writing to the STATUS1 register with the Status Bit 19
(SEQERR) set to 1.
The phase sequence error detection circuit is functional only
when the ADE78xx is connected in a 3-phase, 4-wire, three voltage
sensors configuration (Bits[5:4], CONSEL[1:0] in the ACCMODE
register, set to 00). In all other configurations, only two voltage
sensors are used; therefore, it is not recommended to use the
detection circuit. In these cases, use the time intervals between
phase voltages to analyze the phase sequence (see the Time
Interval Between Phases section for details).
Figure 43 presents the case in which Phase A voltage is not
followed by Phase B voltage but by Phase C voltage. Every time
a negative-to-positive zero crossing occurs, Bit 19 (SEQERR) in
the STATUS1 register is set to 1 because such zero crossings on
Phase C, Phase B, or Phase A cannot come after zero crossings
from Phase A, Phase C, or respectively, Phase B zero crossings.
Once a phase sequence error has been detected, the time
measurement between various phase voltages (see the Time
Interval Between Phases section) can help to identify which
phase voltage should be considered with another phase current
in the computational datapath. Bits[9:8] (VTOIA[1:0]), Bits[11:10]
(VTOIB[1:0]), and Bits[13:12] (VTOIC[1:0]) in the CONFIG
register can be used to direct one phase voltage to the datapath
of another phase. See the Changing Phase Voltage Datapath
section for details.
STATUS1 REGISTER
BIT 19 (SEQERR) IN
VOLTAGES AFTER
A, B, C PHASE
Figure 43. SEQERR Bit Set to 1 When Phase A Voltage Is Followed by
LPF1
IRQ1
STATUS1[19] SET TO 1
ZX A
PHASE A
Phase C Voltage
ZX C
PHASE C
STATUS1[19] CANCELLED
STATUS1 REGISTER WITH
BY A WRITE TO THE
SEQERR BIT SET
ZX B
PHASE B
Rev. D | Page 33 of 96
Time Interval Between Phases
The ADE7854/ADE7858/ADE7868/ADE7878 have the capa-
bility to measure the time delay between phase voltages, between
phase currents, or between voltages and currents of the same
phase. The negative-to-positive transitions identified by the zero-
crossing detection circuit are used as start and stop measuring
points. Only one set of such measurements is available at one time,
based on Bits[10:9] (ANGLESEL[1:0]) in the COMPMODE
register.
When the ANGLESEL[1:0] bits are set to 00, the default value,
the delays between voltages and currents on the same phase are
measured. The delay between Phase A voltage and Phase A
current is stored in the 16-bit unsigned ANGLE0 register (see
Figure 45 for details). In a similar way, the delays between voltages
and currents on Phase B and Phase C are stored in the ANGLE1
and ANGLE2 registers, respectively.
When the ANGLESEL[1:0] bits are set to 01, the delays between
phase voltages are measured. The delay between Phase A voltage
and Phase C voltage is stored into the ANGLE0 register. The
delay between Phase B voltage and Phase C voltage is stored in
the ANGLE1 register, and the delay between Phase A voltage
and Phase B voltage is stored in the ANGLE2 register (see
Figure 46 for details).
When the ANGLESEL[1:0] bits are set to 10, the delays between
phase currents are measured. Similar to delays between phase
voltages, the delay between Phase A and Phase C currents is stored
into the ANGLE0 register, the delay between Phase B and Phase C
currents is stored in the ANGLE1 register, and the delay between
Phase A and Phase B currents is stored into the ANGLE2
register (see Figure 46 for details).
ADE7854/ADE7858/ADE7868/ADE7878
Figure 45. Delay Between Phase A Voltage and Phase A Current Is
Figure 44. Regular Succession of Phase A, Phase B, and Phase C
ZX A
PHASE A
VOLTAGE
PHASE A
ANGLE0
Stored in the ANGLE0 Register
ZX B
PHASE B
CURRENT
PHASE A
ZX C
PHASE C