ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 86

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7854/ADE7858/ADE7868/ADE7878
Bit
Location
8
10:9
11
12
13
14
15
Table 44. Gain Register (Address 0xE60F)
Bit
Location
2:0
5:3
8:6
15:9
Bit Mnemonic
TERMSEL3[2]
ANGLESEL[1:0]
VNOMAEN
VNOMBEN
VNOMCEN
SELFREQ
Reserved
Bit Mnemonic
PGA1[2:0]
PGA2[2:0]
PGA3[2:0]
Reserved
Default Value
1
00
0
0
0
0
0
Default Value
000
000
000
000 0000
Description
Phase C is included in the CF3 outputs calculations.
00: the angles between phase voltages and phase currents are measured.
01: the angles between phase voltages are measured.
10: the angles between phase currents are measured.
11: no angles are measured.
When this bit is 0, the apparent power on Phase A is computed regularly.
When this bit is 1, the apparent power on Phase A is computed using VNOM register instead
of regular measured rms phase voltage.
When this bit is 0, the apparent power on Phase B is computed regularly.
When this bit is 1, the apparent power on Phase B is computed using VNOM register instead
of regular measured rms phase voltage.
When this bit is 0, the apparent power on Phase C is computed regularly.
When this bit is 1, the apparent power on Phase C is computed using VNOM register instead
of regular measured rms phase voltage.
When the ADE7878 is connected to 50 Hz networks, this bit should be cleared to 0 (default
value). When the ADE7878 is connected to 60 Hz networks, this bit should be set to 1. This
bit does not have any consequence for ADE7854, ADE7858, and ADE7868.
This bit is 0 by default and it does not manage any functionality.
Description
Phase currents gain selection.
000: gain = 1.
001: gain = 2.
010: gain = 4.
011: gain = 8.
100: gain = 16.
101, 110, 111: reserved. When set, the ADE7854/ADE7858/ADE7868/ADE7878 behave
like PGA1[2:0] = 000.
Neutral current gain selection.
000: gain = 1. These bits are always 000 for ADE7854 and ADE7858.
001: gain = 2.
010: gain = 4.
011: gain = 8.
100: gain = 16.
101, 110, 111: reserved. When set, the ADE7868/ADE7878 behave like PGA2[2:0] =
000.
Phase voltages gain selection.
000: gain = 1.
001: gain = 2.
010: gain = 4.
011: gain = 8.
100: gain = 16.
101, 110, 111: reserved. When set, the ADE7854/ADE7858/ADE7868/ADE7878 behave
like PGA3[2:0] = 000.
Reserved. These bits do not manage any functionality.
Rev. D| Page 86 of 96