ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 47

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The ADE7854/ADE7858/ADE7868/ADE7878 achieve the
integration of the active power signal in two stages (see Figure 62).
The process is identical for both total and fundamental active
powers. The first stage is accomplished inside the DSP: every
125 μs (8 kHz frequency) the instantaneous phase total or funda-
mental active power is accumulated into an internal register.
When a threshold is reached, a pulse is generated at the processor
port, and the threshold is subtracted from the internal register.
The sign of the energy in this moment is considered the sign of
the active power (see Sign of Active Power Calculation section
for details). The second stage is done outside the DSP and consists
of accumulating the pulses generated by the processor into internal
32-bit accumulation registers. The content of these registers is
transferred to watt-hour registers, xWATTHR and xFWATTHR,
when these registers are accessed.
Figure 63 explains this process. The WTHR 48-bit signed register
contains the threshold. It is introduced by the user and is common
for all phase total active and fundamental powers. Its value
depends on how much energy is assigned to one LSB of watt-
hour registers. Supposing a derivative of wh [10
integer, is desired as one LSB of the xWATTHR register. Then
WTHR is computed using the following expression:
ACCUMULATION
ACTIVE POWER
GENERATED
WTHR
PULSES
VA
IA
IN DSP
DSP
Figure 63. Active Power Accumulation Inside the DSP
APHCAL
=
WTHR[47:0]
PMAX
AVGAIN
AIGAIN
×
U
DIGITAL SIGNAL PROCESSOR
FS
f
S
1 DSP PULSE = 1LSB OF WATTHR[31:0]
×
×
3600
I
FS
HPFDIS
HPFDIS
[23:0]
[23:0]
HPF
HPF
×
10
n
INTEGRATOR
DIGITAL
n
wh], n as an
Figure 62. Total Active Energy Accumulation
LPF2
AWGAIN
(25)
Rev. D | Page 47 of 96
AWATTOS
where:
PMAX = 33,516,139 = 0x1FF6A6B as the instantaneous power
computed when the ADC inputs are at full scale.
f
instantaneous power.
U
the ADC inputs are at full scale.
The maximum value that can be written on WTHR is 2
The minimum value is 0x0, but it is recommended to write a
number equal to or greater than PMAX. Never use negative
numbers.
WTHR is a 48-bit register. As stated in the Current Waveform
Gain Registers section, the serial ports of the ADE7854/ADE7858/
ADE7868/ADE7878 work on 32-, 16-, or 8-bit words. As shown
in Figure 64, the WTHR register is accessed as two 32-bit
registers (WTHR1 and WTHR0), each having eight MSBs
padded with 0s.
This discrete time accumulation or summation is equivalent to
integration in continuous time following the description in
Equation 26.
where:
n is the discrete time sample number.
T is the sample period.
In the ADE7854/ADE7858/ADE7868/ADE7878, the total phase
active powers are accumulated in the AWATTHR, BWATTHR, and
CWATTHR 32-bit signed registers, and the fundamental phase
active powers are accumulated in AFWATTHR, BFWATTHR, and
S
31
FS
= 8 kHz, the frequency with which the DSP computes the
0000 0000
, I
ADE7854/ADE7858/ADE7868/ADE7878
2
FS
Energy
4
Figure 64. WTHR[47:0] Communicated As Two 32-Bit Registers
are the rms values of phase voltages and currents when
24 23
WTHR1[31:0]
47
ACCUMULATOR
AWATT
24 BIT SIGNED NUMBER
=
WTHR[47:0]
∫
p
( )
t
dt
=
Lim
T
WTHR[47:0]
→
24
0
0
⎧
⎨
⎩
23
n
∑
∞
=
31
0
0000 0000
p
( )
nT
24 23
WTHR0[31:0]
×
AWATTHR[31:0]
24 BIT SIGNED NUMBER
T
REVAPA BIT IN
STATUS0[31:0]
REGISTER
⎫
⎬
⎭
32-BIT
0
47
− 1.
(26)
0