ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 79

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Address
0xE519
0xE51A
0xE51B
0xE51F
0xE520
0xE521 to
0xE52E
0xE600
0xE601
0xE602
0xE603
0xE604 to
0xE606
0xE607
0xE608
0xE609 to
0xE60B
0xE60C
0xE60D
0xE60E
0xE60F
0xE610
0xE611
0xE612
0xE613
0xE614
0xE615
0xE616
0xE617
0xE618
0xE700
0xE701
0xE702
0xE703
0xE704
0xE705
0xE706
Register
Name
AVA
BVA
CVA
CHECKSUM
VNOM
Reserved
PHSTATUS
ANGLE0
ANGLE1
ANGLE2
Reserved
PERIOD
PHNOLOAD
Reserved
LINECYC
ZXTOUT
COMPMODE
Gain
CFMODE
CF1DEN
CF2DEN
CF3DEN
APHCAL
BPHCAL
CPHCAL
PHSIGN
CONFIG
MMODE
ACCMODE
LCYCMODE
PEAKCYC
SAGCYC
CFCYC
HSDC_CFG
R
R
R
R/W
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
1
Bit
Length
24
24
24
32
24
16
16
16
16
16
16
16
16
16
16
16
16
16
16
10
10
10
16
16
8
8
8
8
8
8
8
16
16
16
16
Bit Length
During
Communication
32 SE
32 SE
32 SE
32
32 ZP
16
16
16
16
16
16
16
16
16
16
16
16 ZP
16 ZP
16 ZP
16
8
8
8
8
8
8
8
Rev. D | Page 79 of 96
2
Type
S
S
S
U
S
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
ADE7854/ADE7858/ADE7868/ADE7878
3
Default
Value
N/A
N/A
N/A
0x33666787
0x000000
N/A
N/A
N/A
N/A
N/A
N/A
0xFFFF
0xFFFF
0x01FF
0x0000
0x0E88
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
N/A
0x0000
0x1C
0x00
0x78
0x00
0x00
0x01
0x00
4
Description
Instantaneous value of Phase A
apparent power.
Instantaneous value of Phase B
apparent power.
Instantaneous value of Phase C
apparent power.
Checksum verification. See the
Checksum Register section for details.
Nominal phase voltage rms used in the
alternative computation of the
apparent power.
These addresses should not be written
for proper operation.
Phase peak register. See Table 41.
Time Delay 0. See the Time Interval
Between Phases section for details.
Time Delay 1. See the Time Interval
Between Phases section for details.
Time Delay 2. See the Time Interval
Between Phases section for details.
These addresses should not be written
for proper operation.
Network line period.
Phase no load register. See Table 42.
These addresses should not be written
for proper operation.
Line cycle accumulation mode count.
Zero-crossing timeout count.
Computation-mode register. See
Table 43.
PGA gains at ADC inputs. See Table 44.
CFx configuration register. See Table 45.
CF1 denominator.
CF2 denominator.
CF3 denominator.
Phase calibration of Phase A. See
Table 46.
Phase calibration of Phase B. See Table 46.
Phase calibration of Phase C. See Table 46.
Power sign register. See Table 47.
ADE7878 configuration register. See
Table 48.
Measurement mode register.
See Table 49.
Accumulation mode register.
See Table 50.
Line accumulation mode behavior. See
Table 52.
Peak detection half line cycles.
SAG detection half line cycles.
Number of CF pulses between two
consecutive energy latches. See the
Synchronizing Energy Registers with
CFx Outputs section.
HSDC configuration register. See Table 53.