STEVAL-IFS012V1 STMicroelectronics, STEVAL-IFS012V1 Datasheet - Page 49

• Manufacturer Part Number: STEVAL-IFS012V1
• Description: BOARD ST72651AR6/STTS75/STLM20
• Manufacturer: STMicroelectronics

Specifications of STEVAL-IFS012V1

• Sensor Type: Temperature
• Sensing Range: Depends on IC
• Interface: I²C, USB
• Sensitivity: Depends on IC
• Voltage - Supply: 5V
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ST72F651AR6, STTS75, STLM20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8419

I/O PORTS (Cont’d)
9.2.5 Bit manipulation on Open Drain Outputs
As mentioned in
avoid using bit manipulation instructions on the DR
register in open drain output mode, but must al-
ways access it using byte instructions. If bit manip-
ulation is needed, the solution is to use a copy of
the DR register in RAM, change the bits (using
BRES or BCLR instructions for example) and copy
the whole byte into the DR register each time the
value has to be output on a port. This way, no bit
manipulation is performed on the DR register but
each bit of the DR register can be controlled sepa-
rately.
9.3 I/O PORT IMPLEMENTATION
The hardware implementation on each I/O port de-
pends on the settings in the DDR and OR registers
and specific feature of the I/O port such as ADC In-
put or true open drain.
Port B (without Option Register)
PB[7:0]
Table 14. Port Configuration (with Option Register)
floating input
push-pull output
Port A
Port C
Port D
Port E
Port F
Port
PA7:0
PC7:4
PC3:0
PD7:0
PE7:6
PE5
PE4:3
PE2:0
PF6:4
PF3:2
PF1:0
Pin name
MODE
Section
9.2.2, software should
OR = 0
floating
floating
floating
floating
floating
floating
floating
floating
floating
floating
floating
Input
with pull-up, if se-
byte see
lected by option
DDR
with interrupt
with interrupt
with interrupt
with interrupt
0
1
Doc ID 7215 Rev 4
OR = 1
floating
floating
floating
floating
15.1)
Section
Switching these I/O ports from one state to anoth-
er should be done in a sequence that prevents un-
wanted side effects. Recommended safe transi-
tions are illustrated in
are potentially risky and should be avoided, since
they are likely to present unwanted side-effects
such as spurious interrupt generation.
Figure 32. Interrupt I/O Port State Transitions
The I/O port register configurations are summa-
rized as follows.
floating/pull-up
see
ed by option byte
pull-up, if select-
open drain (with
interrupt
INPUT
open drain
open drain
01
open drain
open drain
open drain
Section
OR = 0
True open drain
True open drain
15.1)
push-pull
push-pull
push-pull
(reset state)
floating
INPUT
00
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
Figure 32
Output
OR = 1
open-drain
OUTPUT
10
XX
Other transitions
ST72651AR6
= DDR, OR
High-Sink
OUTPUT
push-pull
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
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