MC56F8367EVME Freescale Semiconductor, MC56F8367EVME Datasheet - Page 10

EVAL BOARD FOR MC56F83X

MC56F8367EVME

Manufacturer Part Number
MC56F8367EVME
Description
EVAL BOARD FOR MC56F83X
Manufacturer
Freescale Semiconductor
Type
DSPr
Datasheets

Specifications of MC56F8367EVME

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8145-67 and MC56F8345-67
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F83xx
Rohs Compliant
Yes
For Use With/related Products
MC56F83x5, MC56F83x6, MC56F83x7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.4 Architecture Block Diagram
Note: Features in italics are NOT available in the 56F8167 device and are shaded in the following figures.
The 56F8367/56F8167 architecture is shown in
Figure 1-1
and
Figure
1-2.
Figure 1-1
illustrates how the
56800E system buses communicate with internal memories, the external memory interface and the IPBus
Bridge.
Table 1-2
lists the internal buses in the 56800E architecture and provides a brief description of
their function.
Figure 1-2
shows the peripherals and control blocks connected to the IPBus Bridge. The
figures do not show the on-board regulator and power and ground signals. They also do not show the
multiplexing between peripherals or the dedicated GPIOs. Please see
Part 2, Signal/Connection
Descriptions,
to see which signals are multiplexed with those of other peripherals.
Also shown in
Figure 1-2
are connections between the PWM, Timer C and ADC blocks. These
connections allow the PWM and/or Timer C to control the timing of the start of ADC conversions. The
Timer C channel indicated can generate periodic start (SYNC) signals to the ADC to start its conversions.
In another operating mode, the PWM load interrupt (SYNC output) signal is routed internally to the Timer
C input channel as indicated. The timer can then be used to introduce a controllable delay before
generating its output signal. The timer output then triggers the ADC. To fully understand this interaction,
please see the 56F8300 Peripheral User Manual for clarification on the operation of all three of these
peripherals.
56F8367 Technical Data, Rev. 8
10
Freescale Semiconductor
Preliminary

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