EVAL-ADUC7032QSPZ Analog Devices Inc, EVAL-ADUC7032QSPZ Datasheet - Page 71
![EVAL DEV QUICK START ADUC7032](/photos/9/24/92482/eval-aduc7032qspz_sml.jpg)
EVAL-ADUC7032QSPZ
Manufacturer Part Number
EVAL-ADUC7032QSPZ
Description
EVAL DEV QUICK START ADUC7032
Manufacturer
Analog Devices Inc
Series
QuickStart™ PLUS Kitr
Type
MCUr
Datasheet
1.EVAL-ADUC7032QSPZ.pdf
(116 pages)
Specifications of EVAL-ADUC7032QSPZ
Contents
Evaluation Board, Power Supply, Cable, Software, Emulator and Documentation
For Use With/related Products
ADuC7032
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 71 of 116
- Download datasheet (3Mb)
TIMER1
Timer1 is a 32-bit general-purpose timer, count-down or count-
up, with a programmable prescalar. The prescalar source can be
the low power 32.768 kHz oscillator, the core clock, or one of
two external GPIOs. This source can be scaled by a factor of 1,
16, 256, or 32,768. This gives a minimum resolution of 48.83 ns
when operating at CD zero; the core is operating at 20.48 MHz,
and with a prescalar of 1 (ignoring external GPIO).
The counter can be formatted as a standard 32-bit value or as
hours:minutes:seconds:hundreths.
Timer1 has a capture register (T1CAP) that can be triggered by
a selected IRQ source initial assertion. Once triggered, the
current timer value is copied to T1CAP and the timer keeps
running. This feature can be used to determine the assertion of
an event with increased accuracy.
The Timer1 interface consists of five MMRs.
•
•
•
Timer1 features a postscalar. This allows the user to count
between 1 and 256 the number of Timer1 timeouts. To activate
the postscalar, the user sets Bit 23 and writes the desired number to
count into Bit 24 to Bit 31 of T1CON. Once that number of
timeouts has been reached, Timer1 generates an interrupt if
T1CON[18] is set.
T1LD, T1VAL, and T1CAP are 32-bit registers that hold
32-bit unsigned integers. T1VAL and T1CAP are read only.
T1CLRI is an 8-bit register. Writing any value to this
register clears the Timer1 interrupt.
T1CON is the configuration MMR described in Table 55.
32.768kHz OSCILLATOR
CLOCK FREQUENCY
LOW POWER
CORE
GPIO
GPIO
1, 16, 256, OR 32768
IRQ[31:0]
PRESCALAR
Figure 31. Timer1 Block Diagram
Rev.0 | Page 71 of 116
CAPTURE
UP/DOWN COUNTER
32-BIT LOAD
32-BIT
Note that if the part is in a low power mode and Timer1 is clocked
from the GPIO or low power oscillator source, Timer1 continues to
operate.
Timer1 reloads the value from T1LD either when Timer1
overflows or immediately when T1CLRI is written.
Timer1 Load Register
Name: T1LD
Address: 0xFFFF0320
Default Value: 0x00000
Access: Write only
Function: This 32-bit register holds the 32-bit value that is
loaded into the counter.
Timer1 Clear Register
Name: T1CLRI
Address: 0xFFFF032C
Access: Write only
Function: This 32-bit, write-only MMR is written (with any
value) by user code to clear the interrupt.
Timer1 Value Register
Name: T1VAL
Address: 0xFFFF0324
Default Value: 0xFFFFFFFF
Access: Read only
Function: This 32-bit register holds the current value of Timer1.
TIMER1
VALUE
POSTSCALAR
8-BIT
TIMER1 IRQ
ADuC7032-8L
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