C8051F350-TB Silicon Laboratories Inc, C8051F350-TB Datasheet - Page 189
C8051F350-TB
Manufacturer Part Number
C8051F350-TB
Description
PROTOTYPINGBOARDWITH C8051F350
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F350-TB
Contents
Board
Processor To Be Evaluated
C8051F35x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F350
Silicon Family Name
C8051F35x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F350
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Bits 7–0: SCR7–SCR0: SPI0 Clock Rate.
Example: If SYSCLK = 2 MHz and SPI0CKR = 0x04,
f
SCK
SCR7
f
SCK
R/W
Bit7
=
=
These bits determine the frequency of the SCK output when the SPI0 module is configured
for master mode operation. The SCK clock frequency is a divided version of the system
clock, and is given in the following equation, where SYSCLK is the system clock frequency
and SPI0CKR is the 8-bit value held in the SPI0CKR register.
for 0 <= SPI0CKR <= 255
200 kHz
f
SCK
------------------------- -
2
2000000
SCR6
×
R/W
Bit6
(
=
4
+
------------------------------------------------ -
2
SFR Definition 21.3. SPI0CKR: SPI0 Clock Rate
×
1
)
(
SPI 0 CKR
SCR5
SYSCLK
R/W
Bit5
SCR4
+
R/W
Bit4
1
)
Rev. 1.1
SCR3
R/W
Bit3
SCR2
R/W
Bit2
C8051F350/1/2/3
SCR1
R/W
Bit1
SFR Address: 0xA2
SCR0
R/W
Bit0
00000000
Reset Value
189
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