C8051F350-TB Silicon Laboratories Inc, C8051F350-TB Datasheet - Page 74

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C8051F350-TB

Manufacturer Part Number
C8051F350-TB
Description
PROTOTYPINGBOARDWITH C8051F350
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F350-TB

Contents
Board
Processor To Be Evaluated
C8051F35x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F350
Silicon Family Name
C8051F35x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F350
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
C8051F350/1/2/3
74
NOTE: Modification of this register is not necessary in most applications. The appropriate circuitry is
Bits7–2: Unused. Read = 000000b; Write = don’t care.
Bit1:
Bit0:
Bit7
R
enabled when it is needed by a peripheral.
BIASE: Internal Oscillator Bias Enable.
This bit is ORed with the Internal Oscillator Enable bit to enable the internal oscillator bias
generator.
0: Internal Oscillator Bias enable determined by Internal Oscillator Enable bit.
1: Internal Oscillator Bias Generator On.
REFBE: Internal Reference Bias Enable Bit.
This bit is ORed with the Enable bits for ADC0, IDAC0, IDAC1, and the Clock Multiplier to
enable the internal bandgap generator.
0: Internal Reference Bias enable determined by individual component.
1: Internal Reference Bias enabled.
Bit6
R
SFR Definition 7.1. REF0CN: Reference Control
Bit5
R
Bit4
R
Rev. 1.1
Bit3
R
Bit2
R
BIASE
R/W
Bit1
SFR Address:
REFBE
R/W
Bit0
0xD1
00000000
Reset Value

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