C8051F350-TB Silicon Laboratories Inc, C8051F350-TB Datasheet - Page 31
C8051F350-TB
Manufacturer Part Number
C8051F350-TB
Description
PROTOTYPINGBOARDWITH C8051F350
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F350-TB
Contents
Board
Processor To Be Evaluated
C8051F35x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F350
Silicon Family Name
C8051F35x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F350
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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4.
DGND
XTAL1
XTAL2
AGND
Pinout and Package Definitions
Name
C2CK
P2.0/
P0.2/
P0.3/
/RST
P0.0
P0.1
P0.4
P0.5
C2D
V
AV+
DD
Pin Numbers
‘F350
‘F352
21
22
10
12
11
13
14
15
16
17
18
Table 4.1. Pin Definitions for the C8051F350/1/2/3
9
‘F351
‘F353
17
18
10
11
12
13
14
6
5
8
7
9
D I/O or
D I/O or
D I/O or
A I/O or
D I/O or
D I/O or
Ground Digital Ground. Must be tied to Ground.
Ground Analog Ground. Must be tied to Ground.
Power
Power
D I/O
D I/O
D I/O
D I/O
D I/O
Type
A In
A In
A In
A In
D In
A In
A In
Description
Digital Supply Voltage. Must be tied to +2.7 V to +3.6 V
power.
Analog Supply Voltage. Must be tied to +2.7 V to +3.6 V
power.
Device Reset. Open-drain output of internal POR or V
monitor. An external source can initiate a system reset by
driving this pin low for at least 15 µs. A 1kΩ pull-up to V
recommended. See Reset Sources Section.
Clock signal for the C2 Debug Interface.
Port 2.0. See Port I/O Section for a complete description.
Bi-directional data signal for the C2 Debug Interface.
Port 0.0. See Port I/O Section for a complete description.
Port 0.1. See Port I/O Section for a complete description.
Port 0.2. See Port I/O Section for a complete description.
This pin is the external oscillator return for a crystal or reso-
nator. See Oscillator Section.
Port 0.3. See Port I/O Section for a complete description.
This pin is the excitation driver for an external crystal or res-
onator, or an external clock input for CMOS, capacitor, or
RC oscillator configurations. See Oscillator Section.
Port 0.4. See Port I/O Section for a complete description.
Port 0.5. See Port I/O Section for a complete description.
Rev. 1.1
C8051F350/1/2/3
DD
DD
is
31
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