C8051F350-TB Silicon Laboratories Inc, C8051F350-TB Datasheet - Page 26
C8051F350-TB
Manufacturer Part Number
C8051F350-TB
Description
PROTOTYPINGBOARDWITH C8051F350
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F350-TB
Contents
Board
Processor To Be Evaluated
C8051F35x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F350
Silicon Family Name
C8051F35x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F350
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F350/1/2/3
1.6.
C8051F350/1/2/3 devices include a software-configurable voltage comparator with an input multiplexer.
The Comparator offers programmable response time and hysteresis and two outputs that are optionally
available at the Port pins: a synchronous “latched” output (CP0), or an asynchronous “raw” output (CP0A).
Comparator interrupts may be generated on rising, falling, or both edges. When in IDLE mode, these inter-
rupts may be used as a “wake-up” source for the processor. Comparator0 may also be configured as a
reset source. A block diagram of the Comparator is shown in Figure 1.9.
1.7.
The C8051F350/1/2/3 Family includes an SMBus/I2C interface, a full-duplex UART with enhanced baud
rate configuration, and an Enhanced SPI interface. Each of the serial buses is fully implemented in hard-
ware and makes extensive use of the CIP-51's interrupts, thus requiring very little CPU intervention.
26
Port I/O
Pins
Programmable Comparator
Serial Ports
Figure 1.9. Comparator0 Block Diagram
+
-
GND
VDD
Decision
Reset
Tree
Rev. 1.1
(SYNCHRONIZER)
D
SET
CLR
Q
Q
D
SET
CLR
Interrupt
Q
Q
Logic
(asynchronous output)
(synchronous output)
CP0A
CP0
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