R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 233

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
IDLS0
IDLCB1
IDLCB0
IDLCA1
IDLCA0
IDLSEL7
IDLSEL6
IDLSEL5
IDLSEL4
IDLSEL3
IDLSEL2
IDLSEL1
IDLSEL0
Initial
Value
1
1
1
1
1
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Idle Cycle Insertion 0
Inserts an idle cycle between the bus cycles when the
external read cycle is followed by external write cycle.
0: No idle cycle is inserted
1: An idle cycle is inserted
Idle Cycle State Number Select B
Specifies the number of idle cycles to be inserted for
the idle condition specified by IDLS1 and IDLS0.
00: No idle cycle is inserted
01: 2 idle cycles are inserted
00: 3 idle cycles are inserted
01: 4 idle cycles are inserted
Idle Cycle State Number Select A
Specifies the number of idle cycles to be inserted for
the idle condition specified by IDLS3 to IDLS0.
00: 1 idle cycle is inserted
01: 2 idle cycles are inserted
10: 3 idle cycles are inserted
11: 4 idle cycles are inserted
Idle Cycle Number Select
Specifies the number of idle cycles to be inserted for
each area for the idle insertion condition specified by
IDLS1 and IDLS0.
0: Number of idle cycles to be inserted for area n is
1: Number of idle cycles to be inserted for area n is
(n = 7 to 0)
specified by IDLCA1 and IDLCA0.
specified by IDLCB1 and IDLCB0.
Rev. 2.00 Sep. 24, 2008 Page 199 of 1468
Section 9 Bus Controller (BSC)
REJ09B0412-0200