R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 976

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 Serial Communication Interface (SCI, IrDA, CRC)
TDRE
TEND
FER/ERS
Note that the TEND flag is set in different timings depending on the GM bit setting in SMR.
Figure 19.30 shows the TEND flag set timing.
Rev. 2.00 Sep. 24, 2008 Page 942 of 1468
REJ09B0412-0200
I/O data
TXI
(TEND interrupt)
Ds
[Legend]
Ds:
D0 to D7: Data bits
Dp:
DE:
Transfer from TDR to TSR
Figure 19.29 Data Re-Transfer Operation in SCI Transmission Mode
GM = 0
GM = 1
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Figure 19.30 TEND Flag Set Timing during Transmission
nth transfer frame
Start bit
Parity bit
Error signal
Ds
D0
D1
[1]
D2
[2]
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
D3
Transfer from TDR to TSR
11.0 etu
12.5 etu
D4
Retransfer frame
D5
D6
D7
Dp
(DE)
[3]
[4]
Guard time
DE
Ds D0 D1 D2 D3 D4
Transfer from TDR to TSR
transfer frame
(n + 1) th