R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 763

IC H8SX/1668 MCU FLASH 144LQFP

R5F61668RN50FPV

Manufacturer Part Number
R5F61668RN50FPV
Description
IC H8SX/1668 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668RN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14.3.9
TSYR selects independent operation or synchronous operation for the TCNT counters of channels
0 to 5. A channel performs synchronous operation when the corresponding bit in TSYR is set to 1.
Bit
7, 6
5
4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name
SYNC5
SYNC4
SYNC3
SYNC2
SYNC1
SYNC0
Timer Synchronous Register (TSYR)
R/W
7
0
Initial
value
All 0
0
0
0
0
0
0
R/W
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SYNC5
R/W
5
0
Description
Reserved
The write value should always be 0.
Timer Synchronization 5 to 0
These bits select whether operation is independent of or
synchronized with other channels.
When synchronous operation is selected, synchronous
presetting of multiple channels, and synchronous clearing
through counter clearing on another channel are possible.
To set synchronous operation, the SYNC bits for at least
two channels must be set to 1. To set synchronous
clearing, in addition to the SYNC bit, the TCNT clearing
source must also be set by means of bits CCLR2 to
CCLR0 in TCR.
0: TCNT_5 to TCNT_0 operate independently (TCNT
1: TCNT_5 to TCNT_0 perform synchronous operation
presetting/clearing is unrelated to other channels)
(TCNT synchronous presetting/synchronous clearing
is possible)
SYNC4
R/W
4
0
SYNC3
R/W
3
0
Rev. 2.00 Sep. 24, 2008 Page 729 of 1468
Section 14 16-Bit Timer Pulse Unit (TPU)
SYNC2
R/W
2
0
SYNC1
R/W
1
0
REJ09B0412-0200
SYNC0
R/W
0
0

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